The workshop will take place on January 23 from 10:00 am to 5:30 pm. The workshop program consists of invited talks and technical presentations. The latter are selected based on submitted abstracts. The invited talks and the technical presentations will cover different aspects of memristor technology including architecture, logic, memory, modeling, device, etc. The list of talks is given next.

Note: this is a networking event meant to exchange useful ideas and initiatives without proceedings!


Title, Speaker, Affiliation


Opening and introduction, Organisers


A fast general purpose CPU utilizing signed-digit encoding and multi-bit memristors;

Daniel Wust, Christopher Söll and Dietmar Fey;

Friedrich-Alexander-University Erlangen-Nürnberg, Germany.


A Resistive CAM Processing-in-Storage for DNA Sequence Alignment;

Roman Kaplan, Leonid Yavits, Ran Ginosar and Uri Weiser;

Technion, Israel.


Coffee break


Joint Keynote with DTHPC workshop;

Perspectives of Memristor and NVM technologies for HPC and embedded computing;

Dietmar Fey;

Friedrich-Alexander-University Erlangen-Nürnberg, Germany.


Memristive Approximate Adders: Design, Analysis and Evaluation;

Rawan Naous, Hamzah Alahmadi and Khaled Nabil Salama;

King Abdullah University of Science and Technology, Thuwal, Saudi Arabia.


Non-Volatile Look-up Table Based FPGA Implementations;

Lei Xie, Hoang Anh Du Nguyen, Mottaqiallah Taouil, Said Hamdioui and Koen Bertels;

Delft University of Technology, the Neherlands


Lunch break


Variability Challenges in Emerging Memristor-based Logic Circuits;

Ioannis Vourkas, Georgios Papandroulidakis, Manuel Escudero, Georgios Ch. Sirakoulis and Antonio Rubio;

Democritus University of Thrace, Xanthi, Greece; Pontificia Universidad Católica de Chile, Santiago, Chile;

Polytechnic University of Catalonia, Barcelona, Spain.


Opportunities and Problems of Multistate ReRAMs in Passive Crossbar Arrays;

Anne Siemon, Christopher Bengel, Wonjoo Kim, Vikas Rana, Dirk Wouters, Rainer Waser and Stephan Menzel;

RWTH Aachen University, Germany;

JARA—Fundamentals for Future Information Technology, Jülich, Germany;

Peter Grünberg Institut 7 (PGI-7), Jülich, Germany.


A note on memristor device modeling;

Alon Ascoli, Ronald Tetzlaff, Leon Chua, Wei Yi and Richard Stanley Williams;

Technical Universityof Dresden, Germany;

Universityof California Berkeley, CA, USA;

HRL Laboratories, CA, USA;

Hewlett Packard, Palo Alto, CA USA.


A procedure to calculate a delay model for memristive switches;

Carol de Benito, Mohamad Moner Al Chawa, Rodrigo Picos and Eugeni Garcia-Moreno;

Universitat de les Illes Balears, Palma de Mallorca, Spain.


Coffee break


Formal Design Space Exploration for Memristor-based Crossbar Architecture;

Marcello Traiola, Alberto Bosio and Mario Barbareschi;

LIRMM, University of Montpellier, France; University of Naples Federico II, Italy.


Data Patterns for Skeleton-based Programming Flows;

Jintao Yu, Razvan Nane, Said Hamdioui and Koen Bertels;

Delft University of Technology, the Netherlands.


Panel session: Memristive technology for Computing: Opportunities and Challenges .

Modertaed by Said Hamdioui

Panellists: Dietmar Fey, Shahar Kvatinsky, khaled Nabil Salama, Anne Siemon, ...








Preliminary deadlines

  • Abstract submission: December 5, 2016
  • Notification of acceptance: December 15, 2016


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Submit your paper here

MemTDAC workshop series